在计算机硬件、超大规模数字集成电路设计和相应算法同步优化等领域进行了长期而深入的研究，特别是深度学习算法的高效硬件部署和加速方面。相关成果发表在IEEE TCAS-I、TCAD、TVLSI、JETCAS等集成电路设计和自动化领域的一流学术期刊，以及IEEE/ACM ICCAD、ACM/SIGDA FPGA、IEEE ISCAS等本行业旗舰会议。学术成果获得国际同行肯定，目前谷歌学术引用量1200多次。担任IEEE TVLSI、IEEE TC、IEEE TCAS-I/II、DAC等诸多高水平期刊和会议的审稿专家。
l Y. Ma, Y. Cao, S. Vrudhula, and J. Seo, “Performance Modeling for CNN Inference Accelerators on FPGA,” In IEEE Trans. on Computer-Aided Design (CAD) of Integrated Circuits and Systems, 2020.
l Y. Ma, Y. Cao, S. Vrudhula, and J. Seo, “Automatic Compilation of Diverse CNNs onto High-Performance FPGA Accelerators,” In IEEE Trans. on Computer-Aided Design (CAD) of Integrated Circuits and Systems, 2020.
l Y. Ma, Y. Cao, S. Vrudhula, and J. Seo, “Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA,” In IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 2018.
l Y. Ma, N. Suda, Y. Cao, S. Vrudhula, and J. Seo, “ALAMO: FPGA Acceleration of Deep Learning Algorithms with a Modularized RTL Compiler,” In Integration, VLSI Journal, 2017.
l Y. Ma, T. Zheng, Y. Cao, S. Vrudhula, and J. Seo, "Algorithm-Hardware Co-Design of Single Shot Detector for Fast Object Detection on FPGAs,” In IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), 2018.
