1. Jiaqi Zhou, Hongou Li, Keyao Jiang, Yiyang Sun, Tianyu Jia*, 31.4 VARSA: A Visual Autoregressive Generation Accelerator Using Performance-Scalable Multi-Precision PE-LUT and Grid-Similarity Attention Compression, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026.
2. Yiqi Jing, Jiaqi Zhou, Yiyang Sun, Siyuan He, Ru Huang, Le Ye*, Tianyu Jia*, 37.6 A 22nm 60.81TFLOPS/W Diffusion Accelerator with Bandwidth-Aware Memory Partition and BL-Segmented Compute-in-Memory for Efficient Multi-Task Content Generation, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
3. Yanchi Dong, Xueping Liu, Yiqi Jing, Ru Huang, Le Ye*, Tianyu Jia*, Distributed Power Management for 22nm AI Processor with Event-driven Exponential Dual-loop LDOs and Online Sparsity-Aware Droop Mitigation, IEEE Symposium on VLSI Technology & Circuits (VLSI), Jun. 2025.
4. Peiran Yan, Qinzhe Zhi, Lifeng Liu, Tianyu Jia*, GenSoC: A Multi-Agent-Assisted SoC Generation Methodology Leveraging Open-Source Hardware, IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2025. (Best Paper Award)
5. Maico Cassel dos Santos†, Tianyu Jia†, Joseph Zuckerman†, Martin Cochet†, Davide Giri, Erik Jens Loscalzo, et al., 14.5 A 12nm Linux-SMP-capable RISC-V SoC with 14 accelerator types, distributed hardware power management and flexible NoC-based data orchestration, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2024. († Equal Contributions)
6.Tianyu Jia et al., An adaptive clock management scheme exploiting instruction-based dynamic timing slack for general-purpose graphic processor unit with deep pipeline and out-of-order execution, International Solid-State Circuits Conference (ISSCC), Feb. 2019.
