围绕端侧低能耗人工智能方向，长期从事类脑体系架构及电路、类脑计算模型及电路、类脑学习算法及电路和数字芯片设计领域相关的研究工作，在国际知名期刊和会议上共发表了30余篇文章，申请了10余项专利。主持国家自然科学基金青年基金项目，作为技术骨干参与国家重点研发计划等多个项目，作为主要负责人研制了以PAICORE系列为代表的多款类脑芯片，相关工作发表于IEEE JSSC、CICC、DATE、TCAS等国际期刊和会议。
近期代表性论文：
1. Y. Zhong et al., “PAICORE: a 1.9-million-neuron 5.181-TSOPS/W digital neuromorphic processor with unified SNN-ANN and on-chip learning paradigm,” IEEE Journal of Solid-State Circuits (JSSC), vol. 60, no. 2, pp. 651–671, Feb. 2025.
2. Yi Zhong et al., “DualLearn: a 4.686pJ/SOP-4.026pJ/FLOP SNN-ANN neuromorphic inference-training processor with distributed and memory-adaptive architecture,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1–4, Apr. 2026.
3. Y. Zhong et al., “NeuroHexa: a 2D/3D-scalable model-adaptive NoC architecture for neuromorphic computing,” Design, Automation & Test in Europe (DATE), pp. 1–7, Mar. 2025.
4. Y. Zhong et al., “An efficient neuromorphic implementation of temporal coding-based on-chip STDP learning,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 70, no. 11, pp. 4241–4245, Nov. 2023.
5. Z. Wang, Z. Ou, Y. Zhong et al., “NeuroREC: a 28-nm efficient neuromorphic processor for radar emitter classification,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 71, no. 12, pp. 6215–6228, Dec. 2024.
